EDN

Synopsys fields dual-language simulation, tweaks VCS

MOUNTAIN VIEW, Calif. — Synopsys Inc. this week joins the ranks of vendors offering “dual-language” simulation with both VHDL and Verilog. But what Synopsys is actually providing is a fast interface ...
Design-Reuse

Synopsys VCS Verilog Simulator Incorporates Breakthrough Verification Capabilities

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 26, 2001-- Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex IC design, today announced VCS(TM) 6.0.1, the latest release of the industry's ...
Semiconductor Engineering

Simulation: Balancing Speed And Debug

There’s an old saying about simulation: “It’s all about the need for speed.” Simulation is the core technology for functional verification of semiconductors, and the demand for higher runtime ...
Design-Reuse

Synopsys Integrates VERA and VCS to Boost Verification Performance

VCS Direct Kernel Interface, Coverage Engine Integration and Waveform Analysis Integration Raise Verification Performance and Productivity MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Nov. 12, 2001-- ...